Junior AMS Layout Design Engineer / 21724BR

Deadline: 25 August 2019

Employment term: Permanent

Category: Hardware Design / Engineering

Job type: Full time

Location: Yerevan

Job description:

Layout design and DRC/LVS verification of NVM memory blocks. These include MTP/OTP memories as well as IP/Chip development and verification.  Close work with analog design engineers.

Requirements​:
1. Analog  layout design and verification background . 
2. Demonstrates good analysis and problem-solving skills.
3. Knowledge  of layout development /verification tools is a  plus . 
4. Good English written and verbal communication skills.

Professional skills

MTP

OTP

Share this job via your favorite social media channel.

You can apply for this job just by following Application procedure.

Application procedures

Apply here.

Please clearly mention that you have heard of this job opportunity on staff.am

Contact details

Website https://www.synopsys.com/company/contact-synopsys/office-locations/armenia.html

Phone: (010) 492-100

Address:

Find Synopsys Armenia on social media