Senior ASIC Physical Design Engineer / 19725BR

Deadline: 11 April 2019

Employment term: Permanent

Category: Hardware Design / Engineering

Job type: Full time

Location: Yerevan

Job description:

Responsible for developing and using backend ASIC design flow from netlist to GDSII & Physical verification  for validating the std cell libraries .

Requires:
- Bachelors or Master’s degree in electronics or electrical engineering (BSEE or MSEE)
- knowledge on VLSI technology
- knowledge on Digital Design Flow
- Gate level and circuit level understanding of CMOS logic design.
- Understanding of timing and design closure aspects
- DRC/LVS understanding
- Good communication, interpersonal skills and team player
-Good English knowledge for everyday communication

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Application procedures

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Contact details

Website։ https://www.synopsys.com/company/contact-synopsys/office-locations/armenia.html

Phone: (010) 492-100

Address: , Armenia

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